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Intel 10GB CX4 DUAL PORT SERVER ADAPTER

10GB CX4 DUAL PORT SERVER ADAPTER

Product images are for illustrative purposes only and may not reflect the actual product.

10GB CX4 Dual Port Server Adapter
Item Code:EXPX9502CX4Price :
AU $838.20 inc GST
AU $762.00 ex GST

Or as low as
AU$10.04
/a week*
Click here to view Flexirent information
Vendor:Intel
Stock:Please Call/Email
Weight:0.24 kg
Brochure:Click here to view pdf brochure  
Intel 10GB CX4 Dual Port Server Adapter

Marketing Text : Adding to a robust family of 10Gigabit Ethernet adapters, Intel is now offeringthe Intel 10 Gigabit CX4 Dual Port Server Adapter.Following the 802.ak specification, the Intel 10Gigabit CX4 Dual Port Server Adapter offers thelowest cost per port of all the current 10GbEinterconnects..PRODUCTBrand Name : IntelManufacturer Web Site : http://www.intel.comProduct Line : Not definedProduct Model : Not definedProduct Type : Server Adapter. .DEVICE FEATURESBus Type : PCI Express 2.0Data Rate Supported : 10 GbEProcessor Manufacturer : IntelProcessor Model : 82598EBInterrupt Levels : INT A.DIMENSIONSHeight (mm) : 167.4Width (mm) : 68.9.OTHER FEATURESNetwork Management : * DMI 2.0 support, WindowsManagement Instrumentation (WMI) and SNMP.
*Remote Installation Services (RIS).
* PXE 2.0

Cable Distance : 100m Quantity : 1 OS Supported #1 : Linux OS Supported #2 : Windows Vista OS Supported #3 : Windows Server 2003 OS Supported #4 : Microsoft Windows Server OS Supported #5 : Free

BSD Operating Temperature : 0 to 55°C Other Features : * Interrupt levels - INTA, MSI, MSI-X.
* LED Indicators - LINK (solid) and ACTIVITY (blinking).
* Industry-leading, energy-efficient de

sign for next-generation 10 Gigabit performance and multi-core processors.
* Enables higher bandwidth and throughput from standard and low-profile PCIe slots and servers.
* Accelerates I/O w

ith higher throughput and lower CPU utilization by offloading processing overhead.
* Provides centralized storage area network (SAN) management at a lower cost than competing iSCSI solutions.
/>* Minimizes the overhead of interrupts.
* Allows load balancing of interrupt handling between multiple cores/CPUs.

 
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